Freescale Semiconductor /SKEAZN84 /ICS /C2

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Interpret as C2

7 43 0 0 00 0 0 0 0 0 0 0 0 (0)LP 0 (000)BDIV

BDIV=000, LP=0

Description

ICS Control Register 2

Fields

LP

Low Power Select

0 (0): FLL is not disabled in bypass mode.

1 (1): FLL is disabled in bypass modes unless debug is active.

BDIV

Bus Frequency Divider

0 (000): Encoding 0-Divides the selected clock by 1.

1 (001): Encoding 1-Divides the selected clock by 2 (reset default).

2 (010): Encoding 2-Divides the selected clock by 4.

3 (011): Encoding 3-Divides the selected clock by 8.

4 (100): Encoding 4-Divides the selected clock by 16.

5 (101): Encoding 5-Divides the selected clock by 32.

6 (110): Encoding 6-Divides the selected clock by 64.

7 (111): Encoding 7-Divides the selected clock by 128.

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